三星S3C2442B 32位精简指令应用处理器用户手册
三星S3C2442B 32位精简指令应用处理器用户手册(中文1800字,英文1900字)
绪言
该用户手册描述了三星电子公司生产的SC32442B 16/32位精简指令结构的微处理器。三星电子的SC32442B是设计成用于手持式设备和仅用极小的体积便为手持设备和一般类型应用提供了低功耗、高性能微处理器解决方案。
◆ 外部存储器控制器
◆ LCD控制器（）专门LCD DMA控制器
◆ 4通道DMA控制器关于外部请求管脚
◆ 3通道UART（红外1.0，64字节T FIFO，和64字节R FIFO）
◆ 2路SPI总线
◆ IIC总线接口
◆ IIS音频CODEC接口
◆ SD主机接口1.0版本及兼容MMC2.11版本协议
◆ 2通道USB主机控制/1通道USB驱动控制器
◆ 4通道PWM定时器/1通道内部定时器/看门狗定时器
◆ 8通道10位ADC和触摸屏接口
◆ RTC的日历功能
英文资料
S3C2442B 32-BIT RISC APPLICATION PROCESSOR
USER’S MANUAL
INTRODUCTION
This user’s manual describes SAMSUNG's SC32442B 16/32-bit RISC microprocessor. SAMSUNG’s SC32442B is designed to provide hand-held devices and general applications with low-power, and high-performance micro-controller solution in small die size. To reduce total system cost, the SC32442B includes the following components. [资料来源：http://Doc163.com]
The SC32442B is developed with ARM920T core, 0.13um CMOS standard cells and a memory complier. Its low-power, simple, elegant and fully static design is particularly suitable for cost- and power-sensitive applications. It adopts a new bus architecture known as Advanced Micro controller Bus Architecture (AMBA).
The SC32442B offers outstanding features with its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache architecture with separate 16KB instruction and 16KB data caches, each with an 8-word line length.
By providing a complete set of common system peripherals, the SC32442B minimizes overall system costs and eliminates the need to configure additional components. The integrated on-chip functions that are described in this document include:
◆ Around 400MHz@1.5V arm and 1.5V internal, 300MHz@1.35V arm and 1.35V internal, 1.8Vmemory, 3.3V external I/O microprocessor with 16KB I-Cache/16KB D-Cache/MMU [资料来源：https://www.doc163.com]
◆ External memory controller (SDRAM Control and Chip Select logic)
◆ LCD controller (up to 4K color STN and 256K color TFT) with LCD-dedicated DMA
◆ 4-ch DMA controllers with external request pins
◆ 3-ch UARTs (IrDA1.0, 64-Byte Tx FIFO, and 64-Byte Rx FIFO)
◆ 2-ch SPls
◆ IIC bus interface (multi-master support) [资料来源：Doc163.com]